Kicad

KiCad Project Analysis Skill

Related Skills

Handoff guidance: Use this skill to parse schematics/PCBs and extract structured data. Hand off to bom for BOM enrichment, pricing, and ordering. Hand off to digikey/mouser/lcsc/element14 for part searches and datasheet fetching. Hand off to jlcpcb/pcbway for fabrication ordering and DFM rule validation. Always run `spice` for simulation verification during design reviews when any SPICE simulator is installed (check with which ngspice ltspice xyce). Always run `emc` for EMC pre-compliance risk analysis during design reviews when both schematic and PCB analysis are available. These are not optional — skipping them leaves value-computation errors and EMC risks undetected.

Before analysis: When the user asks to analyze or review a KiCad project, check whether a datasheets/ directory exists in the project. If not, and DigiKey API keys are available (DIGIKEY_CLIENT_ID), offer to sync datasheets first: "I can download datasheets for your components before analysis — this enables pin-level verification and decoupling validation against manufacturer specs. Want me to sync them?" If the user declines or no API keys are set, proceed without datasheets — the analysis works without them but datasheet verification findings won't be available.

If you see a `DS-001` finding in the analyzer output (severity high, detector audit_datasheet_coverage), the review cannot make any verified claim. Stop and either (a) run the datasheet sync via digikey / mouser / lcsc / element14 (whichever has credentials/stock), (b) populate MPNs on the BOM parts, or (c) state explicitly in the report that every pin-level, electrical, and regulator finding is consistency only — do not use the words "verified", "confirmed", or "per datasheet" anywhere. DS-002 (datasheets missing but MPNs set) and DS-003 (partial MPN coverage) are softer variants with the same implication for the parts they cite.

Design Review Contract

When the user asks for a design review, complete report, ready-to-fab assessment, or anything equivalent, do not stop at running one or two analyzers and summarizing their findings. A design review in this skill has a stricter contract:

1. Read the full workflow in this SKILL.md, not just the analyzer command sections.
2. Read references/report-generation.md before writing the report.
3. Run every applicable analyzer for the files present in the project, then say explicitly which ones were and were not run.
4. Perform raw-file and datasheet cross-verification before claiming anything is "verified".
5. Triage likely analyzer false positives before elevating them into blockers.
6. If a required step could not be done, state it as a review gap, not as silent omission.

Treat this as the minimum bar. Analyzer JSON alone is not the final review.

Minimum Review Checklist

For a full design review, explicitly account for each item below in the report:

• datasheets/ present, synced, or verification gap stated
• analyze_schematic.py
• analyze_pcb.py --full
• cross_analysis.py
• analyze_emc.py
• SPICE simulation when any simulator is installed
• analyze_thermal.py when both schematic and PCB JSON exist
• analyze_gerbers.py when fabrication outputs exist
• lifecycle audit when network access and MPN coverage allow it
• prior review / prior run delta check
• raw schematic/PCB spot-verification elevated to full verification for critical parts
• explicit report sections for blockers, verification basis, false positives, and skipped analyses

If an item is not applicable, say why. If it was skipped, say why. If it failed, say how that limits confidence.

Common Review Failure Modes

These are the failure modes this contract is meant to prevent:

• Stopping after schematic + PCB + EMC output and calling it a complete review
• Reporting analyzer findings without checking whether they are expected layout artifacts
• Claiming "verified" without direct datasheet evidence or structured extraction evidence
• Omitting thermal, lifecycle, prior-review delta, or gerber checks without disclosure
• Writing a report that lacks a verdict, blockers table, verification basis, or skipped-analysis notes
• Reading only the first part of this skill and missing the design-review workflow later in the file

PDF Schematic Analysis

This skill also handles PDF schematics — reference designs, dev board schematics, eval board docs, application notes, and datasheet typical-application circuits. Common use cases:

• Analyze a manufacturer's reference design to understand the circuit
• Extract a subcircuit (power supply, USB interface, sensor front-end) to incorporate into your own KiCad design
• Compare a PDF reference design against your own schematic
• Extract a full BOM from a PDF schematic
• Validate component values in a PDF against current datasheets

Workflow: Read the PDF pages visually → identify components and connections → extract structured data → translate to KiCad symbols and nets → validate against datasheets.

For the full methodology — component extraction, notation conventions, net mapping, subcircuit extraction, KiCad translation, and validation — read references/pdf-schematic-extraction.md.

For deep validation of extracted circuits against datasheets (verifying values, checking patterns, detecting errors), use the methodology in references/schematic-analysis.md.

Analysis Scripts

This skill includes Python scripts that extract comprehensive structured JSON from KiCad files in a single pass. Run these first, then reason about the output.

Read analyzer JSON output directly rather than writing ad-hoc extraction scripts. The JSON schema has specific field names (documented below and in references/output-schema.md) that are easy to get wrong in custom code. To extract a specific section: python3 -c "import json; d=json.load(open('file.json')); print(json.dumps(d['key'], indent=2))".

When the JSON surprises you — an AttributeError, unexpected shape, field returning None that "should" have a value — stop and run --schema before writing a second extraction attempt. It prints the exact field names and types for every top-level key:

python3 <skill-path>/scripts/analyze_schematic.py --schema
python3 <skill-path>/scripts/analyze_pcb.py --schema
python3 <skill-path>/scripts/analyze_gerbers.py --schema

JSON field cheat sheet — the most common mistakes when reading analyzer output by hand: